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Michel BarcolaMB

Michel Barcola

IVVQ Engineer SIL4 — Railway & Embedded

€500/day
Paris, FR
8-15 years

Average response time: 1 hour

Freelancer profile translated to English.
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About Michel

Embedded systems engineer focused on quality & reliability of critical software, mainly on complex embedded systems such as Urbalis 200, 300, 400, Sacem, CBTC, and Rolling stock. Solid background in C/C++, Python, automated testing, integration on simulators (SIL/HIL) and ControlBuild tooling. Strong requirements culture (DOORS), traceability, V-model, contribution to documentation and anomaly tracking.

I bring you:
A strong technical expertise (validation, testing, embedded integration)
A product and customer-oriented vision to improve your deliverables
Field experience (railway, tech, web sectors)

I work on system testing projects, software validation, technical support, or product consulting.
  • French

    Native or bilingual

  • English

    Fluent

Can work on-site
Paris (up to 50km)

Experience

  • Hitachi Rail
    IVV Engineer
    TRANSPORTATION
    November 2025 - Today (8 months)
    Vélizy-Villacoublay, France
    IVV functional activity of interlocking on the ERTMS project.
    Host and target validation of interlocking station configuration
    • Writing documentation (good configuration report and validation report) and technical facts.
    Railway Signaling Interlocking Python Programming functional analysis Jira
  • ALSTOM
    Integration, Validation & Verification – Railway Signaling Urbalis – St-Ouen
    TRANSPORTATION
    June 2022 - July 2025 (3 years and 1 month)
    Saint-Ouen, France
    Adaptation & simulation
    -Development of an integration/simulation tool for the ATC Sol host software under WSL;
    -Execution on simulator, integration tests.
    Automation & integration
    - Host test automation in C/C++, CI under Visual Studio;
    -Migration of the environment to GitHub ALM, TDD.
    Strategy & quality
    -Validation strategy, test plans, impact analyses, sheets & scripts, reports;
    -Code reviews & specification verification.
    MAINTENANCE
    -Maintenance of benches & platforms (computer racks, cabinets).
    QA testing Software Architecture Python TDD Test Automation
  • Hitachi Rail
    Validation & Verification – Railway Signaling (Interlocking System) – Les Ulis
    TRANSPORTATION
    February 2021 - June 2022 (1 year and 4 months)
    Les Ulis, France
    Analysis & Planning
    -Analysis of subsystem specifications;
    -Writing verification plans.
    Strategy & quality
    -Verification strategy, impact analyses, verification plans;
    - Hardware & software verification campaigns; final reports.
    Software Architecture Technical Acceptance

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Education

  • Master in Mechatronics, Microsystems and Embedded Electronics
    University of Franche-Comté
    2016
    Mécatronique, Microsystèmes et Électronique Embarquée.
  • Bachelor of Science in Engineering in Electronics, Electrical Engineering, Automatic Control
    University of Franche-Comté
    2014
    Électronique, Électrotechnique, Automatique

Skill set

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