Freelancer profile translated to English.
Back to original languageAbout Hoang
R&D Engineer in Power Electronics, holder of a Doctorate (PhD) and over 4 years of industrial experience, I specialize in the design of high-efficiency converters ranging from 3.6 kW to 100 kW. My goal is to bridge the gap between research on innovative topologies (NPC, MMC, bridge-less Totem-Pole PFC) and the development of reliable industrial products.
My core expertise lies in analog and power electronics hardware, encompassing the entire development cycle:
Architecture & Design: Definition of electronic architectures based on complex specifications and implementation of advanced control strategies.
Components & Topologies: Selection and optimization of key power components (SiC/GaN, magnetic components) and design of robust thyristor-based protections (SCR).
Schematic & Routing: Creation of electronic schematics and PCB design (Altium Designer, KiCad).
Simulation & Validation: Advanced numerical simulation (LTSpice, Matlab, PLecs, PSIM) and management of prototyping phases (including regenerative opposition / back-to-back test benches).
Industrialization & Reliability: Unit and integration testing, debugging/troubleshooting, obsolescence management (3F/non-regression selection or re-design), and continuous improvement (efficiency, thermal dissipation, EMC compliance).
Quality: Drafting of rigorous technical documentation (with sensitivity to standardized environments CISPR 16-32).
French
Native or bilingual
English
Fluent
Vietnamese
Native or bilingual
Remote only
Primarily works remotely
Experience
- Advantics (ABB)R&D Hardware EngineerMECHANICAL ENGINEERINGApril 2025 - July 2026 (1 year and 3 months)Saint-Genis-Pouilly, FranceProject 1: 100 kW Modular 3-Phase AC/DC ConverterSystem Architecture: Design and integration of a 100 kW modular power unit operating at 675–950 V DC. Engineering of the high-voltage interconnection strategy to ensure balanced current sharing and thermal stability.Magnetic Optimization (Grid-Oriented): Design of robust EMC (Electromagnetic Compatibility) architectures. Critical optimization of the common-mode (CM) choke to prevent saturation under circulating current conditions related to module parallel operation (power-up scenario up to 200–300 kW).Integration: Management of thermal integration and resolution of electromagnetic interferences affecting the CAN communication bus, ensuring stable operation when coupled to the grid.Project 2: 11 kW Single-Phase Isolated AC/DC ConverterMulti-stage Topology Design: Leading the hardware design of a complex SiC-based converter comprising 3 distinct power stages: PFC + DAB (Dual Active Bridge) + Buck.EMC and Optimization: Innovative development of a compact single-stage EMC filter to replace traditional multi-stage solutions, successfully achieving compliance with Class B conducted emission standards.
- STMicroelectronics (Tours)R&D EngineerMECHANICAL ENGINEERINGJanuary 2022 - December 2024 (2 years and 11 months)Tours, FranceProject: Global optimization of a 3.6 kW SiC-based Totem-Pole Power Factor Corrector (PFC) (Topology, Control, and Efficiency Characterization)Topology Evaluation: Study and simulation of 4 main Totem-Pole PFC topologies, including conventional, flying capacitor, interleaved, and multi-level multi-phase architectures, to achieve a peak efficiency of 99%.Passive Component Optimization: Evaluation of over 3 types of Boost inductors (toroidal, planar, and integrated) and management of the active buffer for the DC-link.Control Strategy Analysis: Analysis of 3 current control modes (CCM, CrM, and TCM) to optimize efficiency by finding the best trade-off between semiconductor losses and ideal switching frequencies (72 kHz).Power Loss Analysis: Study of the impact of over 5 key components (boost inductors, DC-link capacitors, EMC filters, SiC MOSFETs, thyristors/SCRs, and driver circuits) on system losses.Efficiency Measurement: Conducting over 4 series of tests for each of the five key PFC elements, allowing for an efficiency improvement from 97.5% to 98.7% (a global gain of over 1%).Inrush Current Limitation: Investigation of over 5 approaches, including soft control, NTC thermistors, mechanical relays, MOSFET-based circuits, and the use of thyristors/SCRs (based on 2 STMicroelectronics patents) to achieve a THD of 3.7%.
- IRT Saint Exupéry,R&D Power ElectronicsMECHANICAL ENGINEERINGApril 2021 - September 2021 (5 months)Toulouse, FranceProject: 80 kW 7-Level DC/AC Three-Phase Converter Topologies with Flying Capacitors (FC)Topology Simulation: Study and simulation of over 3 DC/AC topologies, including series, parallel, and series-parallel multi-level converter architectures, to identify optimal configurations.PWM Strategy Analysis: Analysis of over 4 modulation methods (such as SV-PWM, PS-PWM, PD-PWM, and POD-PWM) to improve converter performance.Converter Control Innovation: Development of a voltage-current balancing method for the DC/AC inverter, achieving a peak efficiency of 98.6%.Performance Comparison: Comparative evaluation of over 3 balancing methods, demonstrating the superior performance of the proposed control law in terms of efficiency and stability.Control Algorithm Validation: Conducting over 10 simulation campaigns and experimental tests to assess robustness, stability, transient response, flying capacitor ripple (FC ripple), and sensor noise immunity.Scientific Output: Publication and presentation of over 2 papers at international conferences.
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Education
- EMC trainingClemson University, EMC Europe)EMC training
Certifications
- Introduction to managementACTIFORCES2024
- Altium Designer FundamentalsPolygone CAO2023