Farid Lahrach

Trainer: Xilinx FPGA Architectures, VHDL Language, and C Language

Company Name: Freelance

Employment Dates: September 2020 – Present

Employment Duration: 4 months

Location: Île-de-France, France

1- Xilinx FPGA Architecture

2- Hardware design possibilities offered by the VHDL language

3- Logic synthesis techniques

4- Analysis of Xilinx FPGA performance and implementation constraints.

5- DEBUG tools and analysis of implementation reports.

6- Zynq-7000 SoC

7- C Language

Context:

Testing new electronic components available on the market for space applications to validate their reliability.

Responsibilities:

- Analysis of specifications

- FPGA Design

• Simulation and synthesis

• Search for optimal architectures

• Debugging complex systems on FPGA target

- Development of software and hardware in LabWindows/CVI for new electronic components

- Architecture: Virtex 5

- Participation in component testing

Atomic and Alternative Energies Commission CEA LIST Development of techniques to increase the reliability level of a Rocket-Chip processor system (RISC-V) operating in Lockstep mode and processors for neural computing.

Responsibilities:

R&D:

• Development of a JTAG module for the PNeuro processor

• Reliability of reconfigurable systems

• Testing of electronic architecture, fault tolerance

• Techniques to increase the reliability of SoC (System on Chip).