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Achille CauteAC

Achille Caute

FPGA/ASIC Engineer

€350/day
Languidic, FR
0-2 years

Average response time: 1 hour

Freelancer profile translated to English.
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About Achille

Hello, I have just finished my engineering degree at INSA de Toulouse with an internship at ASML in the Netherlands, and while waiting for the start of my thesis at CEA-LETI, I am looking for freelance projects for functional verification or IP design for FPGA or ASIC. I already have experience in this field through personal projects and internships, specifically at ASML in functional verification using UVM and in design at LAAS-CNRS, on the localization of sound sources using a generative AI algorithm (SSVAE). Also, I am available until September 28th.
  • English

    Fluent

  • Spanish

    Conversational

  • Dutch

    Conversational

  • French

    Native or bilingual

Remote only
Primarily works remotely

Experience

  • ASML
    UVM verification
    NANO-TECHNOLOGY
    February 2025 - July 2025 (5 months)
    Eindhoven, Netherlands
    • Verification of an AXI-MM to Avalon-MM bridge using UVM (Universal Verification Methodology), and a RAL (Register Abstraction Layer).
    • Design of UVC (Universal Verification Components) for the resets and clocks of the DUT (Design Under Test).
    • Design of an Avalon "dummy" IP for the verification of the DUT, using a register description language (here systemRDL).
    • International work environment, mainly in English, and to a lesser extent in Spanish and Dutch.
    UVM VHDL Verification systemeverilog
  • LAAS-CNRS
    Internship in embedded AI for sound source localization
    RESEARCH
    June 2024 - September 2024 (3 months)
    Toulouse, France
    • Development and training of a generative AI (SSVAE) for sound source localization (SSL). The generative aspect allows for online training. All using both PyTorch and Tensorflow
    • Implementation of signal processing algorithms for calculating the input vectors of our neural networks (GCC PhaT, ScoT, Roth, and ITF)
    • In-depth work on the hardware implementation of these algorithms on FPGA with the creation of a sketch of an IP generator for accelerating neural network inferences.
    FPGA VHDL Signal processing Generative AI
  • Beyou Racing
    Trainee electronics technician
    ENTERTAINMENT AND LEISURE
    June 2023 - September 2023 (3 months)
    56100 Lorient, France
    • Assembly of cables and various components (camera, radar, VHF, alarms, etc.) on the IMOCA Charal and Teamwork.
    • Creation of a mast light control circuit.
    • Updating the plans of the CAN and Ethernet networks of Teamwork.

    • Creation of an application and a database for quick and centralized access to boat maintenance documents using the .NET framework (C# framework for Windows applications), and an SQL database.
    Electronic design Cable assembly Front-End Development SQL

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Education

  • Diplome d'ingérieur en éléctronique et automatique pour les system embarquées (AE-SE)
    Institue nationnal des sciences appliquées
    2025
    Il s'agit d'un diplome d'ingénieur en éléctronique et automatique orienté sur la conception de systèmes embarqués. Les principaux domaines d'études de la formation sont les suivants : - Conception de circuit éléctronique analogiques et numériques. - Automatique discrete et continue pour les sytèmes linéaire et non-linéaire. - Traitement du signal et modélisation des signaux. - Informatique et réseaux - Programmation embarquées D'autres champs sont explorés comme des notions de sécurité matériel et logiciel, IA et machine learning, nanophysique et sciences des semiconducteurs, base de données, télécommunication, etc.

Skill set

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