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Jose FernandezJF

Jose Fernandez

Senior R&D Electronics & FPGA Engineer

€600/day
Madrid, ES
8-15 years

Average response time: 1 hour

About Jose

Engineering professional with 14+ years in medical devices, defense, and aerospace.

Specialized in electronics, FPGA systems, and embedded architectures, combining technical expertise with project leadership.

Proven ability to deliver innovative, compliant solutions on time and cost-efficiently, with a growing focus on AI and digital transformation.
  • Spanish

    Native or bilingual

  • English

    Fluent

  • German

    Conversational

Remote only
Primarily works remotely

Experience

  • SEDECAL, S.A.
    Senior Electronics Engineer (Tech Lead)
    MEDICAL
    March 2014 - Today (12 years and 3 months)
    Algete, Spain
    • Designed FPGA-based controllers (Zynq, Spartan) and DSP motor control applications, integrating multiple communication interfaces (AXI, I²C, SPI, RS-232, PWM, CANOpen) to enhance system performance.
    • Led design and validation of multilayer PCBs, collaborating with QA and Technical Service teams to ensure manufacturability and maintainability.
    • Directed technical projects, coordinating Electronics, QA, Technical Service, Procurement, and external suppliers; performed cost and risk analysis, managed technical budget allocations, and reported progress to senior management under IEC 60601 standards.
    • Key projects: Challenge X, SALA, MRN, Versatility – ceiling and floor X-ray positioning systems.
    FPGA Electronics Project Management Artificial Intelligence (AI) Compliance
  • Indra Sistemas, S.A.
    Systems Engineer
    DEFENSE AND MILITARY
    February 2011 - February 2014 (3 years)
    Aranjuez, Spain
    • Developed VHDL firmware on Virtex FPGA under DO‑254 for mission-critical defense systems including Eurofighter CAPTOR‑E radar, AENA communications, and NOVA Mode‑S radar. Held NATO Secret Clearance, contributing to classified NATO programs.
    FPGA Compliance Electronics Project Management System engineering
  • Polytechnic Univ. of Madrid
    Firmware Engineer
    AVIATION AND AEROSPACE
    January 2009 - January 2011 (2 years)
    Madrid, Spain
    • Designed PCIe communication system with DMA on Altera FPGA; contributed to FastCFD and DOVRES research projects.
    FPGA VHDL Firmware Electronics R&D

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Education

  • AI Leaders – ThePower
    2025
    AI Leaders – ThePower
  • AI Foundations
    Founderz
    2025
    AI Foundations – Founderz

Certifications

  • Project Management Profesional PMP
    Project Management Institute
    Technical project management

Skill set

Categories