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Ingo FriedrichIF

Ingo Friedrich

ASIC/FPGA System Design Consultant

€700/day
Munich, DE
15+ years
VHDL
FPGA
ASIC
Git
Verifikation

Average response time: 1 hour

About Ingo

  • Experienced ASIC/FPGA Designer with 30+ year of experience and successful project work in developing high-performance ASIC/FPGA Designs for a variety of applications.
  • Deep knowledge in Hardware Description Languages VHDL, Verilog, and SystemVerilog.
  • Many years of project experience with the development Tools from Xilinx (Vivado), Altera (Quartus), Synopsys
  • Very extensive knowledge of the design of embedded microcontroller systems and System on Chip (SoC) programming with embedded C and C++
  • Extensive knowledge of Design for Test (DFT) with Synopsys Tools Test Compiler and TetraMAX.
  • Many years of experience in designing and conducting training courses on VHDL, Verilog, ASIC/FPGA design flow, design methodology and EDA software.
  • Comprehensive project experience in requirement-based engineering, especially in the aviation standard process DO-254
  • Extensive experience in version management with ClearCase CVS, SVN, Git.
  • Many yearsproject experience in the application of agile methods with Scrum.
  • Long term experience in design flow control and design containing with TCL/TK, Perl, and Python scripts.
Automotive OEM
Digital and IT Services
Semiconductor and Hardware
Aerospace
Medical Devices

  • German

    Native or bilingual

  • English

    Fluent

Can work on-site
Munich (up to 50km)

Experience

  • Trump Hüttinger
    FPGA Design & System Verification
    TECH
    September 2020 - Today (5 years and 9 months)
    Freiburg, Germany
    - Conception and implementation of the control unit for high-voltage generators
    - Used for plasma and laser processing in the semiconductor industry
    - Algorithm & Functions for Multilevel Pulsing, Etch-Shaping, and Dual Carrier Frequency
    - Implementation of the design in SoC FPGAs von Xilinx Artix7und UltraScale
    - Software design in hardware-related C for MicroBlaze and Sitara ARM processor
    - SVN & Git for versioning and management of design sources files
  • Wenglor MEL
    System & FPGA Design
    MECHANICAL ENGINEERING
    February 2018 - August 2020 (2 years and 7 months)
    Eching, Germany
    - Conception and implementation of fast 3D image capture and processing
    - Creation of universal interface for Sony Exmor CMOS Image Sensor Family
    - Implementation of the SoC design in FPGAs from Xilinx UltraScalePlus with ARM Cortex-A53
    - Connection of LVDS image data to UltraScalePlus PS DDR4 interface
    - Preparation of image information in the external PL DDR4 interface
    - Evaluation and creation of Camera Picture Processing in MatLab
    - Implementation of the MatLab algorithms in ultra-fast FPGA logic
    - Versioning and management of VHDL sources with Git
    - automatic FPGA bit file and embedded Linux generation with Jenkins
    - Schematic and board design with Altium Designer
  • Infineon
    ASIC Design & FPGA Prototyping
    TECH
    December 2015 - January 2018 (2 years and 2 months)
    Munich, Germany
    - Conception and implementation of a fault injection emulator for safety-critical ChipCard ASICs
    - Fault and attack emulation specifically of encryption processors and ARM processor cores
    - RTL fault simulation with Cadence NCSim, synthesis of the 40 nm ASICs with Synopsys Design Compiler
    - script-based DC post-processing of the ASIC netlist and insertion of fault injection cells
    - Hardware verification on Hitex emulator using ASIC to FPGA mapping in Altera Stratix5 FPGAs
    - Control of the fault injection cells via firmware with Perl or TCL scripting
    - Creation and runtime optimization of specific C or assembler test programs
Check out Ingo's experience

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Education

  • Diplom-Ingenieur
    TU Chemnitz
    1995
    09/90 - 06/95 Studium der Informationstechnik an der Technischen Universität Chemnitz 07/92 Vordiplom mit der Note "gut" 08/94 Abschluß der Studienarbeit mit der Note "sehr gut" 06/95 Abschluß der Diplomarbeit mit der Note "sehr gut"

Skill set

Verilog
SVN

Categories

  • Other